Name: Koppar
Author: ai.koppar

Tools observed via MCP handshake

get_workflow_guide — How to drive Koppar end to end, and the instructions for each stage you do yourself: "research" (part research and the dossier), "synthesis" (writing the SKiDL
create_design — Start a new design from the user's brief (what the board must do, its interfaces, power, size and constraints). Returns the design_id every other tool takes and
list_designs — The user's designs, newest first, including ones made in the web app (an agent can continue those too) and board workspaces (kind "board workspace"). With trash
delete_design — Move a design (or a board workspace) to the trash: it leaves list_designs and the web app, and restore_design brings it back for 7 days, after which it is remov
restore_design — Put a deleted design back from the trash (within 7 days of delete_design).
get_design — Where a design stands: the brief, the schematic (accepted or the last blocking error, ERC, part and net counts, submissions), the board run, the readable files,
search_kicad_symbol — Search KiCad's standard symbol libraries for parts whose name contains a substring. Use this whenever you are not 100% sure the (library, name) pair you're abou
get_kicad_symbol — Return the full pin list (number, name, electrical type) and description for a specific KiCad symbol. For some high-risk power parts it also returns curated top
search_kicad_footprint — Search KiCad's standard footprint libraries. Returns 'Library:Footprint' strings suitable for the footprint= argument of Part(...). Query with the package famil
create_custom_symbol — Register a connectable schematic symbol for a part that is NOT in KiCad's libraries (search_kicad_symbol returned nothing). Use this for specialty ICs — LED-mat
add_custom_footprint — Give the design a footprint of your own: a KiCad .kicad_mod (the file's text) for a package KiCad's libraries lack. It joins the design's "custom" footprint lib
save_dossier — Store the research dossier (markdown with ## Parts list, ## Power rails, ## Topology constraints, ## Notes, as the research guide describes). The verified pin t
submit_circuit — Compile and check a complete SKiDL script: the symbol and footprint pre-flight (unambiguous typos are corrected and listed), SKiDL, the ERC score, KiCad ERC, fl
edit_circuit — Apply SEARCH/REPLACE patches to your latest script and re-run every check, as submit_circuit does. The latest script is your last submission when it was sent ba
read_design_file — Read a text file of the design: prompt.txt (brief), dossier.md, circuit.py, circuit.net, result.json, circuit.erc.json (KiCad ERC violations), attempt_N_circuit
get_review_packet — Everything a design review needs in one text: the brief, the dossier, circuit.py and the compiled connectivity (every net with every pin and its function), with
get_board_context — What the board plan is decided from: the computed minimum board, BOARD STATS (pad density, fine-pitch parts, fanout), the parts and nets, board instructions the
start_board — Start place and route with your board plan (the JSON object from the board guide: board, stated, edge, chain, groups, near, side, fixed, keepouts, netClasses).
get_board_status — The board run: stage, size, layers, placement, routing completion, open nets, DRC counts; once finished, DRC violations by type, whether the fab files are relea
get_bom — The live-priced BOM: each line with references, value, footprint, the chosen offer (seller, part number, MPN, price, stock, match quality), alternatives and tot
choose_bom_part — Pick which offer a BOM line uses: the line's references and a seller part number or MPN from its offer or alternatives in get_bom; null goes back to the automat
consolidate_bom_basic — Move every resistor, capacitor and inductor bought outside JLCPCB's basic library onto an in-stock basic-library part of the same value, package and (capacitors
get_fab_status — Whether the board has earned its fab files (zero serious DRC errors, nothing unconnected), and if not, why not.
list_order_providers — The PCB and assembly providers, whether each can quote and take this kind of board today, and what a handoff sends them.
get_order_price — One price for a quantity: parts from the sellers, the board and assembly from the chosen provider's quote, setup fees, and what the total does not include.
send_order_to_provider — Upload the released board (Gerbers, BOM, placement) to a manufacturer and return the page where the user pays. This publishes the design to a third party: call
upload_board — Replace the design's board with a .kicad_pcb you routed or edited yourself (the file, base64). The board must carry the design's circuit: every schematic part b
get_downloads — Download URLs for the design (KiCad project, schematic, netlist, BOM CSV, board file, 3D model, Gerbers, order bundle) and which are available now. They take th
import_kicad_project — Bring an existing KiCad project in as a board workspace: the project folder as a ZIP (the .kicad_pcb, .kicad_pro, schematics, footprint and 3D-model folders), b
get_board_info — The board as it stands: copper layers, outline, design rules and net classes, counts (footprints, nets, tracks, vias, zones, keepouts, KiCad unconnected items),
place_footprints — Put footprints exactly where given: KiCad board coordinates of the footprint origin in mm (y grows downward), rotation in degrees as KiCad shows it, side F or B
auto_place — Pack footprints inside the board outline with Koppar's heuristic placer (ratsnest-driven, courtyard-legal). By default every unlocked footprint moves and locked
anneal_place — Dense placement by simulated annealing: wirelength inside the outline with courtyard gaps, edge connectors held on their edge, fixed and locked parts held, keep
set_board_outline — Replace everything on Edge.Cuts with a new outline: rect (optionally with corner_radius_mm), a polygon of points, or fit_to_parts (the rectangle around every fo
set_design_rules — Set the project design rules (.kicad_pro) and copper layer count. Works on a board workspace and on a generated design (create_design → start_board). On a gener
set_keepouts — Add or remove keepout rule areas. Each keepout is a rect or polygon on the given copper layers (default all) and forbids what it names: no_tracks, no_vias, no_z
check_net_rules — Check the copper against the project's net classes and differential pairs, which KiCad's DRC does not: every class or pair net's narrowest track and the length
check_physics — Judge the copper by physics, which KiCad's DRC does not: impedance from the stackup on controlled nets, IR drop and heating on rails with a stated current, pair
set_zones — Add or remove copper zones (pours). Each zone pours its net on the given copper layers over rect or polygon, by default the whole board outline. priority orders
add_copper — Lay exact copper by hand where the routers leave a gap: tracks as polylines on one copper layer, and through vias. width_mm, diameter_mm and drill_mm default to
prune_vias — Remove every via the board does not need: groups of vias come out, the zones are refilled and KiCad's unconnected count compared, and a via stays only if removi
set_silkscreen — Take clutter off the silkscreen. values "hide" (default) hides value and part-number fields; references "keep" (default), "fab" (moved to the fabrication layer)
route_board — Route under the project's rules and net classes. By default (no nets, no router, none of the single-route options below) it runs the full route pipeline Koppar
repair_board — Keep the copper of every net it already connects and route the nets still open around it: route_board with preserve_existing. The learned router service by defa
ripup_routing — Delete tracks and vias: of the given nets, on the given layers (vias are not layer-filtered), with an end inside region, or all. Filters combine. tracks/vias ch
cleanup_board — Sweep the routing: zero-length and duplicate tracks, stub tracks (a free end, and everything the track touches stays joined without it), and vias that meet thei
add_project_files — Unpack a ZIP into the project folder, keeping its paths: new footprints into a .pretty library the fp-lib-table names, 3D models, a library table. Existing file
swap_footprint — Replace footprints in place with another footprint from a library in the project's fp-lib-table (library:name): the reference, value, position, rotation (or rot
fill_zones — Refill every copper zone with KiCad's zone filler.
stamp_silkscreen — Silkscreen stamps for release, both off unless asked for: a small spec badge ("routed with Koppar", optionally the title, revision and part count) in the larges
tie_rail_pads — Tie neighbouring same-net SMD pads of the plane nets (GND, the rails with a pour) together on their own layer with short tracks, so a group shares one via to th
widen_nets — Grow the tracks (and optionally vias) of the named nets in place, each as wide as its clearance to every other net's copper, holes and the board edge allows, up
finish_board — Close what the router left open the way a designer does: for each open net the diagnosis names the copper boxing it in; that copper is ripped (never a poured ne
bridge_islands — A filled pour cut into islands by routing: one through-via per island that KiCad finds cut off from its net, placed well inside the island and inside the net's
tidy_copper — After routing: every run redrawn as the fewest 0/45/90-degree segments that clear, and every track narrower than its net's netclass width widened where it fits
polish_vias — After route_board and prune_vias: rip one net at a time, most vias first, route it alone around everything else at a high via price, and keep the new copper onl
couple_pairs — After route_board: re-route the weakly coupled differential pairs one at a time, least coupled first. Both legs are ripped and routed alone around everything el
diagnose_open_nets — For every net still open (or the nets named): each pad with the escape corridors free on its own layer, whether a via can be dropped beside it at all, and what
board_census — The numbers a designer judges routed copper by — signal vias per net, share of signal nets without a via, share of signal copper on the outer layers, vias in SM
run_drc — KiCad's DRC on the board as it is now, with schematic parity when the project has its schematic: error and warning counts by type, shorts, unconnected items, pa
score_board — Export the assembled board (3D models, DNP parts left out) and measure it: bounding-box size and volume, via count, copper layers, and the PCBGolf score = volum
render_board — An exact 2D picture of the board as an engineer reads it: copper per layer (the facing layer full strength, the others faded), pads, vias, pours, outline, court
export_step — Export the assembled board as STEP (3D models, DNP parts left out). Download it as workspace.step; workspace.zip includes it.
list_board_revisions — The snapshots of this board, newest first. Revision N is the board as it was before change N (revision 0 is the project as imported); restore_board_revision N g
restore_board_revision — Put the board and its rules back as they were in a revision from list_board_revisions. The current board is saved as a new revision first, so the restore itself
get_board_job — The design's latest board job: its status and, once it ends, its result or error. wait_s holds the call until it ends.

when	check	result	http	latency	detail
56 min ago	mcp initialize	ok	200	28 ms	server koppar 0.1.0 · protocol 2025-06-18 · 66 tools
8 h ago	mcp initialize	ok	200	26 ms	server koppar 0.1.0 · protocol 2025-06-18 · 66 tools
15 h ago	mcp initialize	ok	200	108 ms	server koppar 0.1.0 · protocol 2025-06-18 · 66 tools
22 h ago	mcp initialize	ok	200	21 ms	server koppar 0.1.0 · protocol 2025-06-18 · 66 tools
29 h ago	mcp initialize	ok	200	18 ms	server koppar 0.1.0 · protocol 2025-06-18 · 66 tools
2 d ago	mcp initialize	ok	200	26 ms	server koppar 0.1.0 · protocol 2025-06-18 · 66 tools
2 d ago	mcp initialize	ok	200	26 ms	server koppar 0.1.0 · protocol 2025-06-18 · 66 tools
2 d ago	mcp initialize	ok	200	26 ms	server koppar 0.1.0 · protocol 2025-06-18 · 66 tools
2 d ago	mcp initialize	ok	200	26 ms	server koppar 0.1.0 · protocol 2025-06-18 · 66 tools
3 d ago	mcp initialize	ok	200	25 ms	server koppar 0.1.0 · protocol 2025-06-18 · 66 tools

Koppar

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